1. Field of the Invention
The invention relates to a radio receiver for improving transmission performance based on a desired directivity or diversity system by applying prescribed processing to received signals having reached to a plurality of antennas concurrently, and a despreader to be mounted in the radio receiver and for applying despread processing to received signals which is adaptive to a CDMA system.
2. Description of the Related Art
A code division multiple access (CDMA) system, which essentially has confidentiality and interference-resistibility, is a multiple access system in which the suppression of cochannel interference and the efficient reuse of radio frequencies are possible.
In addition, such a CDMA system is positively being applied to mobile communication systems recently due to the fact that the establishment of technologies for realizing the transmitting power control with high accuracy and high response has enabled the flexible control of radio transmission characteristics by the sector zone.
FIG. 14 is a diagram showing an example of a configuration of a receiving system in a mobile communication system to which the CDMA system is applied.
In the diagram, the feeding ends of the four antennas 141-1 to 141-4 are individually connected to the four inputs of an A/D conversion package 142. The four outputs of the A/D conversion package are connected to the corresponding inputs of a receiver package 144 via lines 143-1 to 143-4, respectively.
The A/D conversion package 142 is composed of: a front end part 145-1 and an A/D converter (A/D) 146-1 cascade-connected between the feeding end of the antenna 141-1 and an end of the line 143-1; a front end part 145-2 and an A/D converter (A/D) 146-2 cascade-connected between the feeding end of the antenna 141-2 and an end of the line 143-2; a front end part 145-3 and an A/D converter (A/D) 146-3 cascade-connected between the feeding end of the antenna 141-3 and an end of the line 143-3; and a front end part 145-4 and an A/D converter (A/D) 146-4 cascade-connected between the feeding end of the antenna 141-4 and an end of the line 143-4.
The receiver package 144 is composed of receiving parts 147-1 to 147-4 and a searcher 148. Each of the receiving parts 147-1 to 147-4 is connected to all of the other ends of the lines 143-1 to 143-4, and supplied with control signals, which designates the type of the despreading code to be applied, from the outside (from an unshown channel controlling equipment, for example). The searcher 148 is arranged between the other end of the line 143-4 and the controlled inputs of the receiving parts 147-1 to 147-4.
The receiving part 147-1 is composed of: multipliers 149-11 to 149-14, whose inputs are individually connected to the other ends of the lines 143-1 to 143-4; a despreading code generating part (CODE) 150-1, whose input is supplied with the said control signals, whose other input is connected to the corresponding output of the searcher 148, and whose output is connected at the output to the other inputs of the multipliers 149-11 to 149-14; and dump filters (DUMP) 151-11 to 151-14, whose filters are arranged individually at the subsequent stages of the multipliers 149-11 to 149-14, and output demodulation signals.
In connection to this, since the receiving parts 147-2 to 147-4 are the same as the receiving part 147-1 in configuration, the corresponding components are hereinafter designated by like numerals with the first index numbers of xe2x80x9c2xe2x80x9d to xe2x80x9c4xe2x80x9d, and explanations and drawings thereof are omitted here.
The searcher 148 is composed of: a cascade-connected matched filter 152, smoothing part 153, and a RAM 154; and a path sensing part 155 arranged at the subsequent stage of the RAM 154 and connected to the corresponding inputs of the despreading code generating parts 150-1 to 150-4 which are individually equipped in the receiving parts 147-1 to 147-4.
The matched filter 152 is composed of: a shift register 156, where it is operated in synchronization with the above-mentioned despreading code and with a clock, which is is 8fc in frequency with respect to the chip rate fc of the despreading code, and has stages of (8Lxe2x88x921) in number with respect to the word length L of the despreading code; a multiplier 157, where it individually connected to each of the inputs and outputs of all the stages of the shift register 156, and weights (either xe2x80x9c1xe2x80x9d or xe2x80x9cxe2x88x921xe2x80x9d) representing the logical values of the corresponding bits are previously individually set among the bits composing a despreading code; and an adder 158, where it is arranged at the subsequent stage of the multiplier 157 as the final stage.It is assumed that the number of stages of the shift register 156 is xe2x80x9c31,xe2x80x9d for simplicity in th following.
In the conventional example of such configuration, the front end parts 145-1 to 145-4 respectively convert the received signals having reached concurrently to the antenna 141-1 to 141-4 into equivalent signals in the baseband domain (hereinafter, referred to as xe2x80x9cspreading signalsxe2x80x9d).
The respective A/D converters 146-1 to 146-4 simultaneously over-sample the spread signals at a period of (xe2x85x9fc) (hereinafter, referred to as xe2x80x9cover-sampling periodxe2x80x9d) with respect to the chip rate fc to generate discrete signals, and send the discrete signals to the lines 143-1 to 143-4.
In the searcher 148 equipped in the receiver package 144, the shift register 156 sequentially stores the discrete signals supplied through the line 143-4, and the multiplier 157 and the adder 158 correlate between the stored discrete signals and the despreading code given in advance as the said weights.
The smoothing part 153 obtains a delay profile as shown in FIG. 15., and stores it in the RAM 154 by averaging the results of the correlation over a period of plural times or more than the period of the despreading code, by every period of the despreading code, and in the order of time series.
The path sensing part 155 reads out the delay profile stored in the RAM 154 as described above, in the order of time series at the periods of the despreading code. By this means, the path sensing part 155 outputs a xe2x80x9cpath detection signal,xe2x80x9d which is composed of pulse sequences showing the time point in which the averaged value exceeding a predetermined threshold value is detected, re-cyclically at the period of the despreading code.
Among the receiving parts 147-1 to 147-4, in the receiving part 147-1, for example, the despreading code generating part 150-1 begins to generate a despreading code at the time point in which a channel allocated based on a prescribed procedure of channel control is shown and the control corresponding signals are given from the outside are supplied concurrently among the pulsed train supplied as the above-mentioned path detection signals.
The multipliers 149-11 to 149-14 apply despread processing to the discrete signals by multiplying the despreading code and the discrete signals supplied through the lines 143-1 to 143-4.
As a result, among the components contained in the received signals having reached to the antennas 141-1 to 141-4, four demodulation signals showing components in the channel allocated under channel control are obtained respectively in the baseband domains at the outputs of the multipliers 149-11 to 149-14.
In connection to this, these modulation signals are perfomed prescribed filter processing in the dump filters 151-11 to 151-14 respectively, and synthetic processing for extracting only the components arriving at the antennas 141-1 to 141-4 based on adaptive algorithms.
However, such synthetic processing is not the feature of the present invention; therefore, the systems containing the adaptive algorithms to be applied and the directivity and diversity systems to be achieved may be of any kind as long as they are adaptive to desired sector zones.
Now, in the above-mentioned conventional example, the number of the lines designated by the numeral xe2x80x9c143xe2x80x9d increases in proportion to the number of the antennas designated by the numeral xe2x80x9c141xe2x80x9d. The number of lines can be lowered, for example by multiplexing the discrete signals generated by the A/D converters 146-1 to 146-4.
However, due to the maximum intrinsic speeds of applicable semiconductor devices and the restriction of power consumption, such configuration in which the discrete signals are simply multiplexed as described above was actually difficult to apply.
Besides, since the bit rate of signals transmitted through the lines 143-1 to 143-4 reaches several megabits per second through several dozen megabits per second, the lines 143-1 to 143-4 need to have the structures for suppressing the radiation of electromagnetic noises applied.
Moreover, since the above-mentioned number of antennas is increasable in the future for configuring sector zones of higher accuracy and smaller sector zones, there is a strong possibility for hampering the functional distribution between the A/D conversion package 142 and the receiver package 144 and the load distribution among plural receiver packages.
In view of the foregoing, an object of the present invention is to provide a radio receiver and a despreader in which the flexible modularization is achieved without greatly increasing the complexity of the configuration of the hardware.
Another object of the present invention is to enable all of desired synthetic processing, phase scanning, frequency scanning and feeding point scanning adaptive to an array antenna system, without lowering the performance of the applied radio transmission systems or greatly increasing the dimension and the price of the hardware.
The foregoing objects can be achieved by the provision of a radio receiver comprising: a plurality N of decimation means for sampling received signals having reached concurrently to a plurality N of antennas respectively in the baseband regions thereof at a plurality N of different phases and at a frequency twice or more the occupied bandwidths thereof to generate discrete signals individually corresponding to the received signals; multiplexing means for multiplexing the discrete signals and outputting a multiple-signal; demultiplexing means for demultiplexing the multiple-signal and restoring the plurality N of discrete signals; and a plurality N of prediction means for subjecting the discrete signals to prediction processing for predicting instantaneous values thereof individually at a common time point given from the outside or set in advance to generate baseband signals respectively showing the received signals having reached concurrently to the plurality N of antennas.
In such a radio receiver, the above-mentioned discrete signals are respectively generated without being sampled for the above-mentioned instantaneous values to be interpolated in the process of the prediction processing among the instantaneous values of the received signals having reached concurrently to the plurality N of antennas, and are multiplexed by the multiplexing means before supplied to the demultiplexing means.
As a result, in the present invention, even in the cases where the number N of the antennas to be mounted is large or the occupied bands of the received signals having reached to the antennas are wide, the band of the multiple-signal outputted by the multiplexing means is held narrow, and the number of lines connecting the multiplexing means and the demultiplexing means is held below the number N of the antennas with high accuracy.
Besides, the foregoing objects can be achieved by the radio receiver wherein the received signals having reached concurrently to the plurality N of antennas are generated based on a direct sequence in which a spreading code of fc in chip rate is applied, and are respectively sampled by the plurality N of decimation means in synchronization with a sampling clock below (xc2xdfc) in period.
In such a radio receiver, the discrete signals to be generated individually by the decimation means are generated by sampling the above-mentioned received signals within the occupied bands in the baseband regions of the received signals at a period in which the sampling theorem holds.
This, accordingly, allows the present invention to be applied to radio transmission systems to which a direct sequence is applied.
In addition, the foregoing objects can be achieved by the radio receiver wherein the received signals having reached concurrently to the plurality N of antennas are respectively sampled at different phases set at regular intervals below (xc2xdNfc) on the time axis.
In such a radio receiver, N transfer functions showing the filtering characteristics to be applied individually in the prediction processing by the plurality N of prediction means are allocated at regular intervals in phase space; therefore, it becomes possible to simplify the algorithms required for the calculation or to standardize the configuration of the hardware for actual use in the setting.
Moreover, the foregoing objects can be achieved by the provision of a radio receiver comprising: path monitoring means for applying despread processing concurrently to the plurality N of discrete signals restored by the demultiplexing means to obtain in the order of time series the spectra of the power despreaded within the transmission bands thereof; phase discrimination means for obtaining a time point in which the power exceeds a prescribed threshold value under the spectra of the power and which corresponds to a path designated from outside, supplying the plurality N of prediction means with the time point as a common time point, and discriminating the time point as the phase of the sampling clock; and despreading means for applying despread processing based on a despreading code of the phase discriminated by the phase discrimination means to the N baseband signals generated by the plurality N of prediction means to obtain demodulation signals individually corresponding to the received signals having reached to the plurality N of antennas.
In such a radio receiver, since a receiving system adaptive to a direct sequence is realized and the despread processing is surely performed, the restriction on the mounting of the hardware is eased and the suppression of interference based on the sector zone configuration and the diversity receiving system becomes possible even in the cases where the number N of the antennas is large.
Furthermore, the foregoing objects can be achieved by the radio receiver wherein the plurality N of discrete signals restored by the demultiplexing means are despread processed and the power despreaded within the transmission bands resulting from the despread processing are measured, in the order of time series and in series.
In such a radio receiver, the path monitoring means are configured without mounting hardware or software for obtaining concurrently the spectra of the power of the respective received signals having reached concurrently to the plurality N of antennas.
As a result, the hardware of the radio receiver is reduced in dimension. Besides, even in the cases where the number N of the antennas to be mounted is large, the restriction on the mounting of the hardware is eased and the suppression of the interference based on the sector zone configuration and the diversity receiving system becomes possible.
Furthermore, the foregoing objects can be achieved by the radio receiver wherein the products of transfer functions showing the filtering characteristics to be used in prediction processing and a despreading code of the phase discriminated by the phase discrimination means is obtained by the multiplication means in advance, and despread processing along with the prediction processing is performed as the filter processing based on the filtering characteristics given in the form of the transfer functions equivalent to the products.
In such a radio receiver, the prediction processing and the despread processing are performed simultaneously, which eases the restriction on the mounting of the hardware and realizes the suppression of interference based on the sector zone configuration and the diversity receiving system even in the cases where the number N of the antennas to be mounted is large.
Furthermore, the foregoing objects can be achieved by the radio receiver wherein the despread processing and the measurement for the spectra of the power despreaded within the transmission bands resulting from despread processing are performed in the order of time series.
In such a radio receiver, the path monitoring means are configured without mounting the hardware or software for obtaining concurrently the spectra of the power of the received signals having reached concurrently to the antennas.
Accordingly, the hardware of the radio receiver is reduced in dimension. Besides, even in the cases where the number N of the antennas to be mounted is large, the restriction on the mounting of the hardware is eased and the suppression of the interference based on the sector zone configuration and the diversity receiving system becomes possible.
Besides, the foregoing objects can be achieved by the radio receiver wherein memory is equipped in which coefficients applicable to the interpolation processing and two values a despreading code takes are stored in advance, and the interpolation processing and the despread processing are performed concurrently by using the coefficients outputted by the memory in accordance with the logical value of the despreading code and the distinction information of the coefficients.
In such a radio receiver, since the despread processing is performed efficiently and simultaneously, the configuration of the hardware is simplified and the adaptation to higher chip rates becomes possible.
Moreover, the foregoing objects can be achieved by a despreader in which the interpolation processing and the despread processing are performed simultaneously by multipling the despreading code and the transfer functions showing the filtering characteristics to be applied in the interpolation processing in real time.
In such a despreader, as long as the errors such as rounding errors and truncation errors produced in the prediction processing and the despread processing are acceptably small, these processings are performed as a single combined processing of the two linear processings. This ensures the degree of freedom in the arrangement and the mounting of the hardware.
Furthermore, the foregoing objects can be achieved by the provision of a despreader in which a memory for storing in advance the products of the two values the despreading code may take and the transfer functions showing the filtering characteristics to be applied in the interpolation processing is equipped, and the interpolation processing and the despread processing are performed based on the filtering characteristics given in the form of products corresponding to the value of the despreading code and desired filtering characteristics among the products described above.
In such a despreader, since the despread processing is performed without using means for exclusively despread processing, the simplification of the hardware configuration and the adaptation to higher chip rates become possible.
Other objects and further features of the present invention are apparent in the following detailed description in conjunction with the accompanying drawings.